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  • Thomas Moestl's avatar
    It seems that clearing the MCR_IE bit in the modem control register · 89eef2de
    Thomas Moestl authored
    does not reliably prevent the triggering of interrupts for all supported
    configurations. Thus, the FIFO size probe could cause an interrupt,
    which could lead to an interrupt storm in the shared interrupt case.
    
    To prevent this, change ns8250_bus_probe() to use the overflow bit in
    the line status register instead of the RX ready bit in the interrupt
    identification register to detect whether the FIFO has filled up.
    This allows us to clear all bits in the interrupt enable register during
    the probe, which should prevent interrupts reliably.
    Additionally, the detected FIFO size may be a bit more accurate, because
    the overflow bit is only set when the FIFO did actually fill up, while
    interrupts would trigger a bit early.
    
    Reviewed and tested on a lot of hardware by:	marcel
    89eef2de