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    x86: Add NUMA nodes into CPU topology. · ef50d5fb
    Alexander Motin authored
    Depending on hardware, NUMA nodes may match last level caches, or
    they may be above them (AMD Zen 2/3) or below (Intel Xeon w/ SNC).
    This information is provided by ACPI instead of CPUID, and it is
    provided for each CPU individually instead of mask widths, but
    this code should be able to properly handle all the above cases.
    
    This change should immediately allow idle stealing in sched_ule(4)
    to prefer load from NUMA-local CPUs to remote ones when the node
    does not match LLC.  Later we may think of how to better handle it
    on sched_pickcpu() side.
    
    MFC after:	1 month
    ef50d5fb