Flush caches before initiating a microcode update on Intel CPUs.

This apparently works around issues with updates of certain Broadwell
CPUs.

Reviewed by:	emaste, kib, sbruno
MFC after:	3 days
Differential Revision:	https://reviews.freebsd.org/D15520

sys/dev/cpuctl/cpuctl.c

@@ -367,8 +367,10 @@ update_intel(int cpu, cpuctl_update_args_t *args, struct thread *td)
 	rdmsr_safe(MSR_BIOS_SIGN, &rev0); /* Get current microcode revision. */
 
 	/*
-	 * Perform update.
+	 * Perform update.  Flush caches first to work around seeingly
+	 * undocumented errata applying to some Broadwell CPUs.
 	 */
+	wbinvd();
 	wrmsr_safe(MSR_BIOS_UPDT_TRIG, (uintptr_t)(ptr));
 	wrmsr_safe(MSR_BIOS_SIGN, 0);