1. 22 May, 2018 25 commits
    • Andrew Turner's avatar
      Only set realmem based on memory where the EXFLAG_NOALLOC is unset. This · 5a00bf53
      Andrew Turner authored
      will allow us to query the maps at any time without disturbing this value.
      
      Obtained from:	ABT Systems Ltd
      Sponsored by:	Turing Robotic Industries
      5a00bf53
    • Andrew Turner's avatar
      On ThunderX2 we need to be careful to only map the memory the firmware · 89b5faf8
      Andrew Turner authored
      lists in the EFI memory map. As such we need to reduce the mappings to
      restrict them to not be the full 1G block. For now reduce this to a 2M
      block, however this may be further restricted to be 4k page aligned as
      other SoCs may require.
      
      This allows ThunderX2 to boot reliably to userspace without performing
      any speculative memory accesses to invalid physical memory.
      
      Sponsored by:	DARPA, AFRL
      89b5faf8
    • Emmanuel Vadot's avatar
      bus_dma(9): arm64 implementation notes · c6231a5f
      Emmanuel Vadot authored
      Indicate that BUS_DMA_COHERENT is supported for bus_dmamem_alloc and
      bus_dmamem_create in the arm64 implementation.
      c6231a5f
    • Andrew Turner's avatar
      Stop using the DMAP region to map ACPI memory. · 9d0728e0
      Andrew Turner authored
      On some arm64 boards we need to access memory in ACPI tables that is not
      mapped in the DMAP region. To handle this create the needed mappings in
      pmap_mapbios in the KVA space.
      
      Submitted by:	Michal Stanek (mst@semihalf.com)
      Sponsored by:	Cavium
      Differential Revision:	https://reviews.freebsd.org/D15059
      9d0728e0
    • Andrew Turner's avatar
      Switch arm64 to use the same physmem code as 32-bit arm. · 79402150
      Andrew Turner authored
      The main advantage of this is to allow us to exclude memory from being
      used by the kernel. This may be from the memreserve property, or ranges
      marked as no-map under the reserved-memory node.
      
      More work is still needed to remove the physmap array. This is still used
      for creating the DMAP region, however other patches need to be committed
      before we can remove this.
      
      Obtained from:	ABT Systems Ltd
      Sponsored by:	Turing Robotic Industries
      79402150
    • Konstantin Belousov's avatar
      Implement printf(3) family %m format string extension. · e95725fe
      Konstantin Belousov authored
      Reviewed by:	ed, dim (code only)
      Sponsored by:	Mellanox Technologies
      MFC after:	1 week
      e95725fe
    • Andrew Turner's avatar
      Allow the 32-bit arm physmem code to work on arm64. · 66971d57
      Andrew Turner authored
      This will help simplify the arm64 code and allow us to properly exclude
      memory that should never be mapped.
      
      Obtained from:	ABT Systems Ltd
      Sponsored by:	Turing Robotic Industries
      66971d57
    • Andrew Turner's avatar
      Coalesce adjacent physical mappings. · 89ae4d7f
      Andrew Turner authored
      This reduces the overhead when we have many small mappings, e.g. on some
      EFI systems. This is to help use this code on arm64 where we may have a
      large number of entries from the EFI firmware.
      
      Obtained from:	ABT Systems Ltd
      Sponsored by:	Turing Robotic Industries
      Differential Revision:	https://reviews.freebsd.org/D15477
      89ae4d7f
    • Roger Pau Monné's avatar
      xen-blkback: do not use state 3 (XenbusStateInitialised) · ffe4446b
      Roger Pau Monné authored
      Linux will not connect to a backend that's in state 3
      (XenbusStateInitialised), it needs to be in state 2
      (XenbusStateInitWait) for Linux to attempt to connect to the backend.
      
      The protocol seems to suggest that the backend should indeed wait in
      state 2 for the frontend to connect, which makes state 3 unusable for
      disk backends.
      
      Also make sure blkback will connect to the frontend if the frontend
      reaches state 3 (XenbusStateInitialised) before blkback has processed
      the results from the hotplug script (Submitted by Nathan Friess).
      
      MFC after:	1 week
      ffe4446b
    • Mateusz Guzik's avatar
      Reduce sdt-related branch-fest in mi_switch. · 99ece3a9
      Mateusz Guzik authored
      The code was evaluating flags before resorting to checking if dtrace is
      enabled. This was inducing forward jumps in the common case.
      99ece3a9
    • Eitan Adler's avatar
      top(1): increase size of 'status' buffer · dbcdf411
      Eitan Adler authored
      This corrects a warning issues by gcc9:
      /srv/src/freebsd/head/usr.bin/top/machine.c:988:22: warning: '%5zu'
      directive writing between 5 and 20 bytes into a
       region of size 15 [-Wformat-overflow=]
           sprintf(status, "?%5zu", state);
      dbcdf411
    • Mateusz Guzik's avatar
      sx: port over writer starvation prevention measures from rwlock · 2466d12b
      Mateusz Guzik authored
      A constant stream of readers could completely starve writers and this is not
      a hypothetical scenario.
      
      The 'poll2_threads' test from the will-it-scale suite reliably starves writers
      even with concurrency < 10 threads.
      
      The problem was run into and diagnosed by dillon@backplane.com
      
      There was next to no change in lock contention profile during -j 128 pkg build,
      despite an sx lock being at the top.
      
      Tested by:	pho
      2466d12b
    • Mateusz Guzik's avatar
      rw: decrease writer starvation · 9feec7ef
      Mateusz Guzik authored
      Writers waiting on readers to finish can set the RW_LOCK_WRITE_SPINNER
      bit. This prevents most new readers from coming on. However, the last
      reader to unlock also clears the bit which means new readers can sneak
      in and the cycle starts over.
      
      Change the code to keep the bit after last unlock.
      
      Note that starvation potential is still there: no matter how many write
      spinners are there, there is one bit. After the writer unlocks, the lock
      is free to get raided by readers again. It is good enough for the time
      being.
      
      The real fix would include counting writers.
      
      This runs into a caveat: the writer which set the bit may now be preempted.
      In order to get rid of the problem all attempts to set the bit are preceeded
      with critical_enter.
      
      The bit gets cleared when the thread which set it goes to sleep. This way
      an invariant holds that if the bit is set, someone is actively spinning and
      will grab the lock soon. In particular this means that readers which find
      the lock in this transient state can safely spin until the lock finds itself
      an owner (i.e. they don't need to block nor speculate how long to spin
      speculatively).
      
      Tested by:	pho
      9feec7ef
    • Cy Schubert's avatar
      Conform to Berne Convention. · c76af090
      Cy Schubert authored
      MFC after:	3 days
      c76af090
    • Marcelo Araujo's avatar
      Revert: r334016 · 92046bf1
      Marcelo Araujo authored
      Revert for now this change, it in somehow breaks init_pci.
      92046bf1
    • Matt Macy's avatar
      df58dad5
    • Marcelo Araujo's avatar
      Include atkbdc header where there are declared the prototype functions · 2d03aa59
      Marcelo Araujo authored
      atkbdc_event and atkbdc_init.
      
      MFC after:	4 weeks.
      Sponsored by:	iXsystems Inc.
      2d03aa59
    • Matt Macy's avatar
      fix i386 builds after r334005 and r334009 · 137fd41b
      Matt Macy authored
      r334005: add pc_ibpb_set as it is now referenced by common code
      (although presumably not needed on i386 since it has been there
      since the first spectre mitigation work on amd64)
      
      r334009: there is no amd64 rflags -> i386 eflags
      137fd41b
    • Matt Macy's avatar
      pmcstat: add option to not decode the leaf function in top mode · 821a352a
      Matt Macy authored
      -I will allow the user to see the hot instruction in question
      as opposed getting the name of the function
      821a352a
    • Marcelo Araujo's avatar
      We must free the variable str. · b5e3928d
      Marcelo Araujo authored
      Spotted by:	clang's static analyzer
      Submitted by:	Tom Rix <trix_juniper.net>
      Reviewed by:	grehan
      MFC after:	4 weeks
      Sponsored by:	iXsystems Inc.
      Differential Revision:	https://reviews.freebsd.org/D10009
      b5e3928d
    • Justin Hibbits's avatar
      Add an IPMI attachment for PowerNV systems · 1a3eaf6c
      Justin Hibbits authored
      IPMI access on PowerNV systems is done through the OPAL firmware.  This adds a
      simple attachment for communicating with the FSP/BMC on these machines.  This
      has been tested on a Talos POWER9 workstation, only in the bootup phase, noting
      the successful attachment messages:
      
      ...
      ipmi0: IPMI device rev. 0, firmware rev. 2.00, version 2.0, device support mask 0
      ipmi0: Number of channels 2
      ...
      
      The ipmi device has not been added to GENERIC64, but may be after further
      testing.  It may also eventually be added to the ipmi module at that point.
      1a3eaf6c
    • Justin Hibbits's avatar
      Add a comment explaining the need of a global temporary variable · 5272c9bd
      Justin Hibbits authored
      cpu_xirr is used only as a temporary location for the OPAL call in
      PIC_DISPATCH().
      
      Requested by:	nwhitehorn
      5272c9bd
    • Justin Hibbits's avatar
      Basic OPAL sensor support for POWER9 platforms · 9c6ba29d
      Justin Hibbits authored
      Summary:
      PowerNV architectures (in the test case POWER9) export sensors via the device
      tree, which are accessed via OPAL calls.  This adds sysctl nodes for each
      device in a generic fashion.  New sysctl nodes are:
      
      dev.opal_sensor.N.sensor
      dev.opal_sensor.N.sensor_min
      dev.opal_sensor.N.sensor_max
      dev.opal_sensor.N.type
      dev.opal_sensor.N.label
      
      These are rooted at a parent attachment under opal, called opalsens.  This does
      not add support for the "sensor groups" defined in the device tree.
      
      Reviewed by:	breno.leitao_gmail.com
      Differential Revision: https://reviews.freebsd.org/D15362
      9c6ba29d
    • Eitan Adler's avatar
      top(1): unbreak build with gcc7; fix varargs · bc875b45
      Eitan Adler authored
      - use correct function for varargs argument
      - allow build to complete with gcc7 at current WARNS
      
      Reported by:	jhibbits, ian
      bc875b45
    • John Baldwin's avatar
      Cleanups related to debug exceptions on x86. · 9e2154ff
      John Baldwin authored
      - Add constants for fields in DR6 and the reserved fields in DR7.  Use
        these constants instead of magic numbers in most places that use DR6
        and DR7.
      - Refer to T_TRCTRAP as "debug exception" rather than a "trace trap"
        as it is not just for trace exceptions.
      - Always read DR6 for debug exceptions and only clear TF in the flags
        register for user exceptions where DR6.BS is set.
      - Clear DR6 before returning from a debug exception handler as
        recommended by the SDM dating all the way back to the 386.  This
        allows debuggers to determine the cause of each exception.  For
        kernel traps, clear DR6 in the T_TRCTRAP case and pass DR6 by value
        to other parts of the handler (namely, user_dbreg_trap()).  For user
        traps, wait until after trapsignal to clear DR6 so that userland
        debuggers can read DR6 via PT_GETDBREGS while the thread is stopped
        in trapsignal().
      
      Reviewed by:	kib, rgrimes
      MFC after:	1 month
      Differential Revision:	https://reviews.freebsd.org/D15189
      9e2154ff
  2. 21 May, 2018 15 commits