1. 30 May, 2015 1 commit
  2. 11 Apr, 2015 1 commit
    • Andrew Turner's avatar
      Add support for the uart classes to set their default register shift value. · 405ada37
      Andrew Turner authored
      This is needed with the pl011 driver. Before this change it would default
      to a shift of 0, however the hardware places the registers at 4-byte
      addresses meaning the value should be 2.
      
      This patch fixes this for the pl011 when configured using the fdt. The
      other drivers have a default value of 0 to keep this a no-op.
      
      MFC after:	1 week
      405ada37
  3. 07 Mar, 2015 1 commit
  4. 28 Jun, 2014 1 commit
  5. 27 Jun, 2014 2 commits
    • Glen Barber's avatar
      Revert r267961, r267973: · 37a107a4
      Glen Barber authored
      These changes prevent sysctl(8) from returning proper output,
      such as:
      
       1) no output from sysctl(8)
       2) erroneously returning ENOMEM with tools like truss(1)
          or uname(1)
       truss: can not get etype: Cannot allocate memory
      37a107a4
    • Hans Petter Selasky's avatar
      Extend the meaning of the CTLFLAG_TUN flag to automatically check if · 3da1cf1e
      Hans Petter Selasky authored
      there is an environment variable which shall initialize the SYSCTL
      during early boot. This works for all SYSCTL types both statically and
      dynamically created ones, except for the SYSCTL NODE type and SYSCTLs
      which belong to VNETs. A new flag, CTLFLAG_NOFETCH, has been added to
      be used in the case a tunable sysctl has a custom initialisation
      function allowing the sysctl to still be marked as a tunable. The
      kernel SYSCTL API is mostly the same, with a few exceptions for some
      special operations like iterating childrens of a static/extern SYSCTL
      node. This operation should probably be made into a factored out
      common macro, hence some device drivers use this. The reason for
      changing the SYSCTL API was the need for a SYSCTL parent OID pointer
      and not only the SYSCTL parent OID list pointer in order to quickly
      generate the sysctl path. The motivation behind this patch is to avoid
      parameter loading cludges inside the OFED driver subsystem. Instead of
      adding special code to the OFED driver subsystem to post-load tunables
      into dynamically created sysctls, we generalize this in the kernel.
      
      Other changes:
      - Corrected a possibly incorrect sysctl name from "hw.cbb.intr_mask"
      to "hw.pcic.intr_mask".
      - Removed redundant TUNABLE statements throughout the kernel.
      - Some minor code rewrites in connection to removing not needed
      TUNABLE statements.
      - Added a missing SYSCTL_DECL().
      - Wrapped two very long lines.
      - Avoid malloc()/free() inside sysctl string handling, in case it is
      called to initialize a sysctl from a tunable, hence malloc()/free() is
      not ready when sysctls from the sysctl dataset are registered.
      - Bumped FreeBSD version to indicate SYSCTL API change.
      
      MFC after:	2 weeks
      Sponsored by:	Mellanox Technologies
      3da1cf1e
  6. 29 May, 2014 2 commits
  7. 19 Jan, 2014 1 commit
    • Warner Losh's avatar
      Introduce grab and ungrab upcalls. When the kernel desires to grab the · d76a1ef4
      Warner Losh authored
      console, it calls the grab functions. These functions should turn off
      the RX interrupts, and any others that interfere. This makes mountroot
      prompt work again. If there's more generalized need other than
      prompting, many of these routines should be expanded to do those new
      things.
      
      Should have been part of r260889, but waasn't due to command line typo.
      
      Reviewed by:	bde (with reservations)
      d76a1ef4
  8. 26 Oct, 2013 1 commit
    • Zbigniew Bodek's avatar
      Wait for DesignWare UART transfers completion before accessing line control · 49e368ac
      Zbigniew Bodek authored
      When using DW UART with BUSY detection it is necessary to wait
      until all serial transfers are finished before manipulating the
      line control. LCR will not be affected when UART is busy.
      In addition, if Divisor Latch Access Bit is being set in order to
      modify UART divisors:
      1. We will get BUSY interrupt if interrupts are enabled.
      2. Because LCR will not be affected the THR and (even worse) IER
         contents will be corrupted. This will lead to console hang.
      
      Approved by:	cognet (mentor)
      49e368ac
  9. 30 Aug, 2013 1 commit
    • Marcel Moolenaar's avatar
      A final test with unmodified code has shown that a delay of 150ms · 40a827b6
      Marcel Moolenaar authored
      is not giving us a 100% success rate. Bump the delay to 200ms as
      that seems to do the trick.
      
      Note that during testing the delay was added to uart_bus_attach()
      in uart_core.c. While having the delay in a different place can
      change the behaviour, it was not expected. Having to bump the
      delay with another 50ms could therefore be an indication that
      the problem can not be solved with delays.
      
      Reported by: kevlo@
      Tested by: kevlo@
      40a827b6
  10. 29 Aug, 2013 1 commit
    • Marcel Moolenaar's avatar
      Work-around a timing problem with the ITE IT8513E now that the core · 4fc49975
      Marcel Moolenaar authored
      calls ns8250_bus_ipend() almost immediately after ns8250_bus_attach().
      As it appears, a line break condition is being signalled for almost
      all received characters due to this. A delay of 150ms seems enough
      to allow the H/W to settle and to avoid the problem.
      More analysis is needed, but for now a regression has been addressed.
      
      Reported by: kevlo@
      Tested by: kevlo@
      4fc49975
  11. 21 Aug, 2013 1 commit
  12. 01 Mar, 2013 1 commit
    • Ganbold Tsagaankhuu's avatar
      Add support for A10 uart. · ac4adddf
      Ganbold Tsagaankhuu authored
      A10 uart is derived from Synopsys DesignWare uart and requires
      to read Uart Status Register when IIR_BUSY has detected.
      Also this change includes FDT check, where it checks device
      specific properties defined in dts and sets the busy_detect variable.
      broken_txfifo is also needed to be set in order to make it work for
      A10 uart case.
      
      Reviewed by: marcel@
      Approved by: gonzo@
      ac4adddf
  13. 27 Jan, 2013 1 commit
    • Colin Percival's avatar
      Add a loader tunable "hw.broken_txfifo" which enables a workaround for a · 1c60b24b
      Colin Percival authored
      bug in old versions of QEMU (and Xen, and other places using QEMU code).
      On those buggy emulated UARTs, the "TX idle" interrupt gets lost; with
      this workaround, we spinwait for the TX to happen and then send ourselves
      the interrupt.  It's ugly but it works, while minimizing the impact on
      the code for the !broken_txfifo case.
      
      MFC after:	2 weeks
      1c60b24b
  14. 02 Nov, 2011 1 commit
  15. 26 May, 2011 1 commit
  16. 21 Feb, 2011 1 commit
  17. 19 Oct, 2010 1 commit
  18. 10 May, 2010 1 commit
  19. 02 May, 2010 1 commit
  20. 30 Oct, 2009 1 commit
  21. 08 Apr, 2009 1 commit
  22. 19 Oct, 2008 1 commit
  23. 30 May, 2008 1 commit
    • Benno Rice's avatar
      The XScale PXA255 has three generally ns16x50 compatible UARTs. One of the · 0aefb0a6
      Benno Rice authored
      variations from normal 16x50 behaviour however is the the use of a normally
      unused bit of IER to control RX timeout interrupts independently of the
      generally used RXRDY bit.  If this bit is not enabled, we only ever get
      interrupts when the FIFO is full, never before.  This is not very useful when
      the UART is being used as a console.
      
      In order to support this without causing potential problems on more "normal"
      16x50 variants, this change introduces two hints for the uart device, ier_mask
      and ier_rxbits.  These can be used to override which bits get set and cleared
      when we're enabling and disabling RX interrupts.
      
      Reviewed by:	marcel
      0aefb0a6
  24. 12 Mar, 2008 1 commit
  25. 03 Apr, 2007 1 commit
    • Marcel Moolenaar's avatar
      Don't use a time-limiting loop that's defined in terms of the baudrate · 35777a2a
      Marcel Moolenaar authored
      in the putc() method.  Likewise, in the getc() method, don't check for
      received characters with an interval defined in terms of the baudrate.
      In both cases it works equally well to implement a fixed delay.  More
      importantly, it avoids calculating a delay that's roughly 1/10th the
      time it takes to send/receive a character. The calculation is costly
      and happens for every character sent or received, affecting low-level
      console or debug port performance significantly. Secondly, when the
      RCLK is not available or unreliable, the delays could disrupt normal
      operation.
      
      The fixed delay is 1/10th the time it takes to send a character at
      230400 bps.
      35777a2a
  26. 02 Apr, 2007 1 commit
    • Marcel Moolenaar's avatar
      Don't expose the uart_ops structure directly, but instead have · f8100ce2
      Marcel Moolenaar authored
      it obtained through the uart_class structure. This allows us
      to declare the uart_class structure as weak and as such allows
      us to reference it even when it's not compiled-in.
      It also allows is to get the uart_ops structure by name, which
      makes it possible to implement the dt tag handling in uart_getenv().
      The side-effect of all this is that we're using the uart_class
      structure more consistently which means that we now also have
      access to the size of the bus space block needed by the hardware
      when we map the bus space, eliminating any hardcoding.
      f8100ce2
  27. 28 Mar, 2007 1 commit
    • Marcel Moolenaar's avatar
      For embedded UARTs compatible with the ns8250 family it is possible · ebecffe9
      Marcel Moolenaar authored
      that the driver clock is identical to the processor or bus clock.
      This is the case for the PowerQUICC processor. When the clock is
      high enough, overflows happen in the calculation of the time it
      takes to send 1/10 of a character, used in delay loops. Fix the
      overflows so as to fix bugs in the delay loops that can cause either
      insufficient delays or excessive delays.
      ebecffe9
  28. 18 Jan, 2007 1 commit
    • Marius Strobl's avatar
      - Add a uart_rxready() and corresponding device-specific implementations · 97202af2
      Marius Strobl authored
        that can be used to check whether receive data is ready, i.e. whether
        the subsequent call of uart_poll() should return a char, and unlike
        uart_poll() doesn't actually receive data.
      - Remove the device-specific implementations of uart_poll() and implement
        uart_poll() in terms of uart_getc() and the newly added uart_rxready()
        in order to minimize code duplication.
      - In sunkbd(4) take advantage of uart_rxready() and use it to implement
        the polled mode part of sunkbd_check() so we don't need to buffer a
        potentially read char in the softc.
      - Fix some mis-indentation in sunkbd_read_char().
      
      Discussed with:	marcel
      97202af2
  29. 23 May, 2006 2 commits
  30. 27 Apr, 2006 1 commit
  31. 23 Apr, 2006 1 commit
  32. 02 Apr, 2006 1 commit
  33. 01 Apr, 2006 1 commit
  34. 30 Mar, 2006 1 commit
  35. 24 Feb, 2006 2 commits
  36. 06 Jan, 2005 1 commit